| บทคัดย่อ(English) |
This thesis is to study on life assessment of IC by accelerated testing, whichaccelerates IC to fail earlier by increasing stress. Then time-to-failure data, gatheredfrom accelerated testing, will be used to evaluate life time in the normal operationcondition by using suitable statistical theory and mathematical models. Moreover, theinformation gathered from the testing can describe other characteristics which concernabout quality such as failure rate. The stresses used in this experiment are temperatureand voltage. The testing performs with flash memory IC, which are fabricated by CMOStechnology and TSOP(Thin Small Outline Package) packaging. Number of samples for eachexperiment is fifty. Fifty-six experiments are done. The mean life time of IC, determining from the single failure mode, is about187,790 hours (21 years) based on the failure mode relevant to the speed of IC. |
